? semiconductor components industries, llc, 2014 october, 2014 ? rev. 0 publication order number: lm339s/d 1 lm339s, lm2901s single supply quad comparators these comparators are designed for use in level detection, low?level sensing and memory applications in consumer and industrial electronic applications. features ? single or split supply operation ? low input bias current: 25 na (typ) ? low input offset current: 5.0 na (typ) ? low input offset voltage ? input common mode voltage range to gnd ? low output saturation voltage: 130 mv (typ) @ 4.0 ma ? ttl and cmos compatible ? these devices are pb?free, halogen free/bfr free and are rohs compliant pin connections 3 2 1 1 2 3 4 5 6 7 14 8 9 10 11 12 13 output 2 - input 1 output 1 output 3 output 4 + input 1 - input 2 + input 2 + input 4 - input 4 + input 3 - input 3 v cc gnd 4 (top view) see detailed ordering and shipping information on page 5 o f this data sheet. ordering information http://onsemi.com marking diagrams 1 pdip?14 n suffix case 646 lmxxxx = specific device code a = assembly location wl = wafer lot y, yy = year ww = work week g = pb?free package lm339sn awlyywwg 1 14 lm2901sn awlyywwg 1 14
lm339s, lm2901s http://onsemi.com 2 maximum ratings rating symbol value unit power supply voltage v cc +36 or 18 vdc input differential voltage range v idr 36 vdc input common mode voltage range v icmr ?0.3 to v cc vdc output short circuit to ground (note 1) i sc continuous power dissipation @ t a = 25 c plastic package derate above 25 c p d 1/r ja 1.0 8.0 w mw/ c junction temperature t j 150 c operating ambient temperature range lm2901s lm339s t a ?40 to +105 0 to +70 c storage temperature range t stg ?65 to +150 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. the maximum output current may be as high as 20 ma, independent of the magnitude of v cc . output short circuits to v cc can cause excessive heating and eventual destruction. figure 1. circuit schematic v cc + input - input output gnd note: diagram shown is for 1 comparator.
lm339s, lm2901s http://onsemi.com 3 electrical characteristics (v cc = +5.0 vdc, t a = +25 c, unless otherwise noted) characteristic symbo l lm339s lm2901s unit min typ max min typ max input offset voltage (note 2) v io ? 2.0 5.0 ? 2.0 7.0 mvdc input bias current (notes 2, 3) (output in analog range) i ib ? 25 250 ? 25 250 na input offset current (note 2) i io ? 5.0 50 ? 5.0 50 na input common mode voltage range v icmr 0 ? v cc ?1.5 0 ? v cc ?1.5 v supply current i cc ma r l = (for all comparators) ? 0.8 2.0 ? 0.8 2.0 r l = , v cc = 30 vdc ? 1.0 2.5 ? 1.0 2.5 voltage gain r l 15 k , v cc = 15 vdc a vol 50 200 ? 25 100 ? v/mv large signal response time v i = ttl logic swing, v ref = 1.4 vdc, v rl = 5.0 vdc, r l = 5.1 k ? ? 200 ? ? 200 ? ns response time (note 4) v rl = 5.0 vdc, r l = 5.1 k ? ? 1.0 ? ? 1.0 ? s output sink current v i (?) +1.0 vdc, v i (+) = 0, v o 1.5 vdc i sink 6.0 16 ? 6.0 16 ? ma saturation voltage v i (?) +1.0 vdc, v i (+) = 0, i sink 4.0 ma v sat ? 130 400 ? 130 400 mv output leakage current v i (+) +1.0 vdc, v i (?) = 0, v o = +5.0 vdc i ol ? 0.1 ? ? 0.1 ? na product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 2. at the output switch point, v o 1.4 vdc, r s 100 5.0 vdc v cc 30 vdc, with the inputs over the full common mode range (0 vdc to v cc ?1.5 vdc). 3. the bias current flows out of the inputs due to the pnp input stage. this current is virtually constant, independent of the o utput state. 4. the response time specified is for a 100 mv input step with 5.0 mv overdrive. for larger signals, 300 ns is typical.
lm339s, lm2901s http://onsemi.com 4 performance characteristics (v cc = +5.0 vdc, t a = t low to t high (note 5)) characteristic symbol lm339s lm2901s unit min typ max min typ max input offset voltage (note 6) v io ? ? 9.0 ? ? 15 mvdc input bias current (notes 6, 7) (output in analog range) i ib ? ? 400 ? ? 500 na input offset current (note 6) i io ? ? 150 ? ? 200 na input common mode voltage range v icmr 0 ? v cc ?2.0 0 ? v cc ?2.0 v saturation voltage v i (?) +1.0 vdc, v i (+) = 0, i sink 4.0 ma v sat ? ? 700 ? ? 700 mv output leakage current v i (+) +1.0 vdc, v i (?) = 0, v o = 30 vdc i ol ? ? 1.0 ? ? 1.0 a differential input voltage all v i 0 vdc v id ? ? v cc ? ? v cc vdc 5. (lm339s) t low = 0 c, t high = +70 c (lm2901s) t low = ?40 c, t high = +105 c 6. at the output switch point, v o 1.4 vdc, r s 100 5.0 vdc v cc 30 vdc, with the inputs over the full common mode range (0 vdc to v cc ?1.5 vdc). 7. the bias current flows out of the inputs due to the pnp input stage. this current is virtually constant, independent of the o utput state. figure 2. inverting comparator with hysteresis figure 3. noninverting comparator with hysteresis v ref = v cc r1 r ref + r1 r2 r1 / / r ref amount of hysteresis v h v h = r2 r2 + r3 [(v o(max) - v o(min) ] v ref v cc r1 r ref + r1 r3 r1 / / r ref / / r2 v h = r1 / / r ref r1/ / r ref + r2 [v o(max) - v o(min) ] r2 rref / / r1 + v cc vi n v ref + v cc + v cc v in v ref r ref r ref - + - + v o v o 10k r1 r2 r3 10 k 1.0 m r3 r2 1.0 m 10 k r1 10 k 10 k figure 4. driving logic figure 5. squarewave oscillator logic device v cc (v) r l k cmos ttl 1/4 mc14001 1/4 mc7400 +15 +5.0 100 10 r s = source resistance r1 r s t1 = t2 = 0.69 rc f 7.2 c( f) r2 = r3 = r4 r1 r2 // r3 // r4 - + + - v cc v in v ref v cc 4.0 v v cc + c 330 k r4 330 k r3 r1 100 k 10 k r1 t1 t2 v cc v o r s r l r2 330 k
lm339s, lm2901s http://onsemi.com 5 applications information these quad comparators feature high gain, wide bandwidth characteristics. this gives the device oscillation tendencies if the outputs are capacitively coupled to the inputs via stray capacitance. this oscillation manifests itself during output transitions (v ol to v oh ). to alleviate this situation input resistors < 10 k should be used. the addition of positive feedback (< 10 mv) is also recommended. it is good design practice to ground all unused input pins. differential input voltages may be larger than supply voltages without damaging the comparator?s inputs. voltages more negative than ?300 mv should not be used. 10 figure 6. zero crossing detector (single supply) figure 7. zero crossing detector (split supplies) v in(min) 0.4 v peak for 1% phase distortion ( ). d1 prevents input from going negative by more than 0.6 v. r1 + r2 = r3 r3 r5 for small error in zero crossing v in 10 k d1 r1 8.2 k 6.8 k r2 15 k r3 +15 v v cc 10 k v in v ee v in v in(min) v cc v o v ee 10 m r5 220 k r4 220 k v o v o + ordering information device package shipping ? lm339sng pdip?14 (pb?free) 25 units / rail LM2901SNG pdip?14 (pb?free) 25 units / rail ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
lm339s, lm2901s http://onsemi.com 6 package dimensions pdip?14 case 646?06 issue r 17 14 8 b2 note 8 d a top view e1 b b l a1 a c seating plane 0.010 ca side view m 14x d1 e a2 note 3 m b m eb e end view end view with leads constrained dim min max inches a ???? 0.210 a1 0.015 ???? b 0.014 0.022 c 0.008 0.014 d 0.735 0.775 d1 0.005 ???? e 0.100 bsc e 0.300 0.325 m ???? 10 ??? 5.33 0.38 ??? 0.35 0.56 0.20 0.36 18.67 19.69 0.13 ??? 2.54 bsc 7.62 8.26 ??? 10 min max millimeters notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. dimensions a, a1 and l are measured with the pack- age seated in jedec seating plane gauge gs?3. 4. dimensions d, d1 and e1 do not include mold flash or protrusions. mold flash or protrusions are not to exceed 0.10 inch. 5. dimension e is measured at a point 0.015 below datum plane h with the leads constrained perpendicular to datum c. 6. dimension e3 is measured at the lead tips with the leads unconstrained. 7. datum plane h is coincident with the bottom of the leads, where the leads exit the body. 8. package contour is optional (rounded or square corners). e1 0.240 0.280 6.10 7.11 b2 eb ???? 0.430 ??? 10.92 0.060 typ 1.52 typ c a2 0.115 0.195 2.92 4.95 l 0.115 0.150 2.92 3.81 h note 5 note 6 m on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 lm339s/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
|
